High-bandwidth memory (HBM)
Stacked DRAM bonded next to a processor to feed it data fast enough, and one of the hardest parts of an AI accelerator to supply.
High-bandwidth memory is DRAM built as a vertical stack of dies, connected through the silicon itself and placed immediately beside the processor rather than out on a board. The point is bandwidth: a large model is usually waiting on memory rather than on arithmetic, so the memory system decides how much of a processor's theoretical throughput is actually reachable.
Supplying it is harder than supplying commodity DRAM in three specific ways. The stacking and bonding steps have their own yield behaviour, the test burden is higher because a failure anywhere in a stack wastes the whole stack, and the finished stack must then be assembled with the processor in advanced packaging - so two independent capacity constraints multiply rather than add.
The result is that HBM allocation is contracted well ahead of production and behaves like a scarce industrial input rather than a commodity component. Tracking it means tracking qualified lines and committed volumes, not spot prices, which is why it sits in the same model as foundry capacity rather than in a market feed.
Evidence that keeps pace with the decision.
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