Advanced packaging
The steps that assemble finished dies and memory into one working accelerator, and the usual bottleneck in AI hardware supply.
Advanced packaging is everything that happens after a wafer is fabricated and before a chip is a usable part: dies are cut, tested, placed on an interposer or bonded directly to one another, connected to memory, and sealed into a package the rest of the system can mount. For a large AI accelerator this stage is as technically demanding as the lithography before it, and it runs on separate lines in separate buildings from the fab.
It matters disproportionately because it is where capacity is scarcest. A wafer that cannot be packaged is not an accelerator, and packaging capacity is added in whole facilities on multi-year lead times - so the ceiling for a given year was effectively set two years earlier. Combined with high-bandwidth memory supply, it explains most of the gap between announced chip demand and delivered chip volume.
For anyone tracking compute supply, the practical consequence is that a fab expansion and a packaging expansion are different events with different timelines, and only the second one changes near-term output. That is why the two are held as separate entities with separate provenance rather than as one capacity number.
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